(1) Field of the Invention
The present invention relates to a time-division switching circuit for exchanging a time slot with another time slot in one cycle of time-division multiplexed data where the above one cycle of data comprises a plurality of time-division multiplexed data each having a different data format.
In time-division multiplexing equipment or time-division switching systems, exchanges of time slots in the data are carried out by a time switch.
Recently, in the field of multi-media transmissiom, wherein time-division multiplexed data including voice data, image data, and data from computer terminals, and the like are transmitted, a technique for realizing an effective transmission is required. In a multi-media transmission, each of the voice data, image data, and data from computer terminals, has an individual data format in the time-division multiplexed data.
In time-division multiplexing equipment and time-division switching systems controlling the above multi-media transmission, exchanges of time slots across different types of data each having a different data format are required in addition to exchanges of time slots within each type of data.
For example, when the transmission rate of a particular type of data is low, that low bit rate data may need to be transformed to another data format corresponding to another type of data, and then be included and transmitted in time slots in a part of a time region which are originally assigned to that above, another type of data, to realize a totally effective multi-media transmission.
(2) Description of the Related Art
FIG. 1 shows an outline of a conventional construction for carrying out exchanges of time slots within each type of data, and exchanges of time slots across the different types of data in conventional time-division multiplexing equipment when two types of data are time-division multiplexed and transmitted.
In FIG. 1, reference numeral 51 denotes a circuit for carrying out exchanges of time slots within the first type of data, 52 denotes a circuit for carrying out exchanges of time slots within the second type of data, and 53 denotes a format transformation circuit between the first and second types of data.
As shown in FIG. 1, in the conventional construction, the above circuit 51 for carrying out exchanges of time slots within the first type of data, the circuit 52 for carrying out exchanges of time slots within the second type of data, and the format transformation circuit 53 for carrying out the format transformation between the first and second types of data, are separately and independently provided.
For example, to exchange a time slot in the first type of data with a time slot in the second type of data in the conventional construction, first, the format of the first type of data is transformed to the format of the second type of data through the above circuit 53, and then, the time slot is exchanged with the time slot in the second type of data through the above circuit 52.
The above circuits 51 and 52 each have a construction of a time switch comprising a data buffer memory and an address control memory, and the construction of the format transformation circuit 53 can be realized by a construction similar to the above time switch, or a hardware circuit constructed for each format transformation.
However, in the conventional construction as mentioned above, the hardware size is large, and accordingly, the control of this hardware is complicated, and the delay time is large due to the two step operation for the format transformation through the transformation circuit 53 and the exchange of time slots in each of the formats through the circuits 51 or 52.